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| Application Note by Applications Staff, This application note describes the routines for the control of an X9408 or X9418 digitally controllable potentiometer. The X9408/X9418 devices have a variety of different instructions that provide flexibility to the designer. Additionally, the nonvolatile nature of the device allows for stored wiper positions that can be retrieved after power cycles. The following code implements all of the available X9408/X9418 instructions using a standard bi-directional bus protocol. Although the subroutines occupy about 300 bytes of program memory, designers who won't need to implement all of the instructions can shorten the code by removing any unnecessary routines. However, this will necessitate the reassembly of the code. AN 114 Interfacing the X9408/X9418 XDCP to 8051 Microcontrollers For those instructions which program the nonvolatile data registers (XFR_WCR, GXFR_WCR, & WRITE_DR), acknowledge polling has been implemented to determine an early completion of the internal write cycle. Although this is automatically handled by the routines, a word or two regarding the procedure should be informative. After issuing a start condition, the master sends a slave address and receives an acknowledge. It then issues an instruction byte to the X9408/ X9418 and again receives an acknowledge. If necessary, it now transmits the data byte and receives a final acknowledge. The master must then initiate a stop condition which will cause the X9408/X9418 to begin an internal write cycle. The X9408/X9418 pins go to high impedance until this internal cycle is complete. The +5V R1 10K U1 39 38 37 36 35 34 33 32 12 13 17 10 14 15 11 16 19 18 31 9 P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 INT0 INT1 RD RXD T0 T1 TXD WR X1 X2 EA/VP RST 80C51 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 ALE/P PSEN 1 2 3 4 5 6 7 8 21 22 23 24 25 26 27 28 30 29 R2 10K U2 17 7 SCL SDA VH0 VW0 VL0 VH1 VW1 VL1 VH2 VW2 VL2 18 5 8 20 19 A3 A2 A1 A0 VSS X940 8 VH3 VW3 VL3 VCC V+ V3 4 2 10 11 9 15 14 16 22 21 23 1 24 13 -5V Figure 1. Connecting the X9408 to an 80C51 microcontroller REV 1.1 11/12/02 www.xicor.com 1 of 12 Application Note master can now begin acknowledge polling by successively sending start conditions followed by "dummy" instructions. When the X9408/X9418 finally answers with an acknowledge, the internal write cycle has been completed. The master must then initiate a stop condition. After the next start condition, the X9408/X9418 is ready to receive further instructions. In the code listing, an assumption was made that the code executes upon a reset of the microcontroller. That is, the code is loaded into low memory, however this can be changed with an ORG assembler directive. Simple MAIN program routines are included in the code listing. These can be modified for different device addresses, different registers and different DCPs within the device. AN 114 In this listing, the commands cause an X9408/X9418 (at A3A2A1A0 = 1100 to be accessed.) The listing also includes some instructions that are specific to the Cygnal 80C51 processor. These should be examined and modified, as needed, for the specific 80C51 in the system. The commands issued in the "Main" section of the code are simple assignment and call sequences. In Figure 1, a representative hardware connection between the X9408 and an 8051 family microcontroller is shown. The pull-up resistors on the SDA and SCL lines are determined by the total capacitance of all of the devices connected to the bus, which is about 18pF. 80C51 MICROCONTROLLER ROUTINES FOR MANIPULATING AN X9408 ;----------------------------------------------------------------------------; ; 80C51 MICROCONTROLLER ROUTINES FOR MANIPULATING AN X9408 ; QUAD EEPOT ; ; (C) XICOR INC. 2002 ; CEM ; ; FILE NAME : X9408_8051.TXT ; TARGET MCU: Cygnal C8051F000 ; DESCRIPTION: ; ; This code provides basic 80C51 code for commmunicating with and ; controlling the X9408 quad digital potentiometer. In this listing ; is code that implements all of the available X9408 instructions. ; The X9408 communicates via a 2-wire bus that is similar, but a little ; different from the I2C bus. This code is very generic and can be ; simplified and shortened by removing any unnecessary routines. ; ; For those instructions which program the nonvolatile data registers ; (XFR_WCR, GFXR_WCR, and WRITE_DR) this program provides acknowledge ; polling to determine early completion of the internal write cycle. ; Although this is handled automatically by the routines, some background ; might be helpful. ; ; After issuing a start condition, the master sends a slave address ; and receives and acknowledge (ACK). The master then sends an instruction ; byte to the X9408 and again receives an ACK. If necessary, the master sends ; a data byte and receives a final ACK. The master then initiates a stop ; condition to signal the X9408 to begin an internal nonvolatile write ; cycle. When the write cycle begins, the I/O pins go to a high impedance state ; and remain in this state until the nonvolatile write is complete. ; ; Immediately following the stop condition, the master can begin acknowledge ; polling by successively sending start conditions, followed by "dummy" ; instructions. When the X9408 finally answers with an acknowledge, the ; internal write cycle is completed. The master then issues a stop ; condition. After the next start condition, the X9408 is ready to receive ; further instructions. ; REV 1.1 11/12/02 www.xicor.com 2 of 12 Application Note ; ; ; ; ; ; ; ; ; ; ; ; ; This code give the flexibility to communicate with up to 16 different X9408 devices on the same bus. It does this by using a register, named "ADDR_BYTE". This register is loaded with the specific slave address and address of the desired X9408 device. The register can be saved if there is only one X9408 on the bus, by making ADDR_BYTE a constant. An 80C51 register is used to identify the particular X9408 register or DCP, or both, are used for a particular operation. There are various constants available for easy selection of the WCR and DR combination. The contents of the register is appended to the specific instruction in the "instr_gen' routine. A register is used as a counter for keeping track of the number of bits sent in each byte. AN 114 ; A register is used for the increment/decrement instruction to specify up or ; down movement of the wiper. For each command, the master loads the "PULSES" ; register with a direction bit and 6 bits of count. If the MSB is a 1 ; the wiper increments the specified number of tap positions. If the MSB ; is a 0 the wiper decrements the specified number of tap positions. ; ; A register is used to hold the specific command being executed. This allows ; the instruction to be built up and sent to the X9408. ; ; In the MAIN section are sample main code segments showing how to use the ; various subroutines. ; ; This code was tested on a Cygnal 80C51 microcontroller, using the Cygnal ; tools. The specific routines required to set up the Cygnal processor ; are identified and are probably not needed for other standard 8051 devices. ; Since each 8051 may have specific requirements that are not handled in this ; code, the programmer is advised to check the setup needs of the specific ; 80C51 derivation that is being used. ; ;----------------------------------------------------------------------------; I/O Definition ;----------------------------------------------------------------------------SCL SDA bit bit p1.0 p1.1 ; 80C51 pin used AS SCL ; 80C51 pin used AS SDA ;----------------------------------------------------------------------------; Register Definition ;----------------------------------------------------------------------------$include (c8051f000.inc); Include regsiter definition file (Cygnal). TEMP COUNT PULSES COMMAND ID ADDR_BYTE DATA_BYTE equ equ equ equ equ equ equ r1 r2 r3 r4 r5 r6 r7 ; ; ; ; ; ; ; Scratch register Loop counting register Bits -> DIR 0 ###### (#=pulses = 0 to 64) Instruction (I.E. 0,4,8,12,16,...) Bits -> 0 0 0 0 R1 R0 P1 P0 Bits -> 0 1 0 1 A3 A2 A1 A0 Bits -> CM DW D5 D4 D3 D2 D1 D0 ;----------------------------------------------------------------------------; Constant Definition ;----------------------------------------------------------------------------SLAVE_ADR0 SLAVE_ADR1 SLAVE_ADR2 SLAVE_ADR3 SLAVE_ADR4 SLAVE_ADR5 SLAVE_ADR6 equ equ equ equ equ equ equ 050h 051h 052h 053h 054h 055h 056h REV 1.1 11/12/02 www.xicor.com 3 of 12 Application Note SLAVE_ADR7 SLAVE_ADR8 SLAVE_ADR9 SLAVE_ADR10 SLAVE_ADR11 SLAVE_ADR12 SLAVE_ADR13 SLAVE_ADR14 SLAVE_ADR15 ; WCR_0 WCR_1 WCR_2 WCR_3 ; DR_0 DR_1 DR_2 DR_3 ; DCP0_R0 DCP0_R1 DCP0_R2 DCP0_R3 ; DCP1_R0 DCP1_R1 DCP1_R2 DCP1_R3 ; DCP2_R0 DCP2_R1 DCP2_R2 DCP2_R3 ; DCP3_R0 DCP3_R1 DCP3_R2 DCP3_R3 ; READWCR WRITEWCR READDR WRITEDR XFRDR XFRWCR GXFRDR GXFRWCR INCDECWIPER equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ 057h 058h 059h 05Ah 05Bh 05Ch 05Dh 05Eh 05Fh 00h 01h 02h 03h 00h 04h 08h 0Ch 00h 04h 08h 0Ch 01h 05h 09h 0Dh 02h 06h 0Ah 0Eh 03h 07h 0Bh 0Fh 0 4 8 12 16 20 24 28 32 AN 114 ;----------------------------------------------------------------------------; INTERNAL RAM ;----------------------------------------------------------------------------STACK_TOP equ 060H ; Stack top ;----------------------------------------------------------------------------; RESET and INTERRUPT VECTORS ;----------------------------------------------------------------------------cseg AT 0 ljmp main ; Locate a jump to the start of code at REV 1.1 11/12/02 www.xicor.com 4 of 12 Application Note ;----------------------------------------------------------------------------; CODE SEGMENT ;----------------------------------------------------------------------------Code_Seg segment CODE rseg using Code_Seg Switch to this code segment. Specify register bank for the following program code. AN 114 ;----------------------------------------------------------------------------; ; NAME: execute ; FUNCTION: Determines which X9408 instruction is issued, ; then executes ; INPUTS: COMMAND ; OUTPUTS: none ; CALLS: read_wcr, read_dr, write_wcr, write_dr, xfr_dr, ; xfr_wcr, gxfr_dr, gxfr_wcr, inc_wiper ; AFFECTED: DPTR, A ; ;----------------------------------------------------------------------------execute: mov mov jmp first: call ret call ret call ret call ret call ret call ret call ret call ret call ret read_wcr write_wcr read_dr write_dr xfr_dr xfr_wcr gxfr_dr gxfr_wcr inc_wiper ; COMMAND #0 ; COMMAND #4 ; COMMAND #8 ; COMMAND #12 ; COMMAND #16 ; COMMAND #20 ; COMMAND #24 ; COMMAND #28 ; COMMAND #32 dptr,#first a,COMMAND @a+dptr ; Get Base Address ; Jump Offset ; Jump to instruction handler ;----------------------------------------------------------------------------; ; The following routines handle each X9408 instruction. ; These are called by the "execute" routine. ; ; read_wcrReads a WCR and returns its value in DATA_BYTE ; write_wcrWrites the value in DATA_BYTE to a WCR ; read_drReads a Data Register and returns its value in DATA_BYTE ; write_drWrites the value in DATA_BYTE to a data register ; xfr_drTransfers the value in a data register to its WCR ; xfr_wcrTransfers the value in a WCR to one of its data registers ; gxfr_drGlobal transfer of data registers to WCRs ; gxfr_wcrGlobal transfer of WCRs to Data Registers ; inc_wiperSingle Step Increment/Decrement of wiper position for WCR ; REV 1.1 11/12/02 www.xicor.com 5 of 12 Application Note ; FUNCTION: Appends bits R1, R0, P1, P0 to the appropriate ; Instruction code and passes the instruction byte to the ; Instruction Generator. ; INPUTS: ID ; OUTPUTS: NONE ; CALLS: instr_gen ; AFFECTED: ID,A,DPTR ; ;----------------------------------------------------------------------------read_wcr: mov orl mov mov call ret write_wcr: mov orl mov mov call ret read_dr: mov orl mov mov call ret write_dr: mov orl mov mov call ret xfr_dr: mov orl mov mov call ret xfr_wcr: mov orl mov mov call ret gxfr_dr: mov orl mov mov call ret a,ID a,#090h ID,a dptr,#case1 instr_gen ; ; ; ; Get bits x x P1 P0 Append to read WCR instruction code Save the result Jump to the base addr for this instruciton AN 114 a,ID a,#0A0h ; ID,a dptr,#case2 instr_gen ; Get bits x x P1 P0 Append to Write WCR instruction code ; Save the result ; Jump to the base addr for this instruction a,ID a,#0B0h ID,a dptr,#case1 instr_gen ; ; ; ; Get bits R1 R0 P1 P0 Append to Read DR instruction code Save the result Jump to the base addr for this instruction a,ID a,#0C0h ID, a dptr,#case3 instr_gen ; ; ; ; Get bits R1 R0 P1 P0 Append to Write DR instruction code Save the result Jump to the base addr for this instruction a,ID a,#0D0h ID, a dptr,#case4 instr_gen ; ; ; ; Get bits R1 R0 P1 P0 Append to the XFR DR instruction code Save the result Jump to the addr for this instruction a,ID ; Get bits R1 R0 P1 P0 a,#0E0h ; Append to the XFR WCR instruction code ID, a ; Save the result dptr,#case5 ; Jump to the addr for this instruction instr_gen a,ID a,#010h ID, a dptr,#case4 instr_gen ; ; ; ; Get bits R1 R0 x x Append to the GXFR DR instruction code Save the result Jump to the addr for this instruction REV 1.1 11/12/02 www.xicor.com 6 of 12 Application Note gxfr_wcr: mov orl mov mov call ret inc_wiper: mov orl mov mov call ret a,ID a,#080h ID, a dptr,#case5 instr_gen ; ; ; ; Get bits R1 R0 x x Append to the GXFR WCR instruction code Save the result Jump to the addr for this instruction AN 114 a,ID a,#020h ID,a dptr,#case6 instr_gen ; ; ; ; Get bits x x P1 P0 Append to the Incr Wiper instruction code Save the result Jump to the addr for this instruction ;----------------------------------------------------------------------------; ; NAME: instr_gen (Instruction generator) ; FUNCTION: Issues appropriate I2C protocol for each X9408 instruction ; INPUTS: ADDR_BYTE, ID, PULSES, DPTR, DATA_BYTE ; OUTPUTS: DATA_BYTE ; CALLS: start_cond, stop_cond, send_byte, send_bit, get_byte, polling ; AFFECTED: DATA_BYTE, A, COUNT ; ;----------------------------------------------------------------------------instr_gen: call mov call jc mov call jc clr jmp case6: mov anl mov mov anl wiper_lp: call djnz case4: jmp case2: mov call jmp case1: call jmp case3: mov call a,DATA_BYTE send_byte ; Send X9408 Data Byte get_byte stop_gen ; Receive X9408 Data Byte a,DATA_BYTE send_byte stop_gen ; Send X9408 data byte stop_gen ; If program gets here, then it is done a,PULSES a,#00111111b COUNT, a a,PULSES a,#10000000b ; A <- Bits DIR X D5 D4 D3 D2 D1 D0 ; A <- Bits 0 0 D5 D4 D3 D2 D1 D0 ; Save as the number of pulses ; A <- Bits DIR 0 0 0 0 0 0 0 start_cond a,ADDR_BYTE send_byte stop_gen a,ID send_byte stop_gen a @a +dptr ; Issue an I2C start condition ; Send X9408 slave/address byte ; if NACK, end... ; Send X9408 instruction byte ; if NACK, end... ; Reset offset before jump ; Jump to various instruction cases send_bit ; Send the bit (a single pulse) COUNT,wiper_lp ; Continue until all pulses are sent REV 1.1 11/12/02 www.xicor.com 7 of 12 Application Note call call jmp case5: call call stop_gen: call ret stop_cond polling stop_cond ; Issue a stop condition ; Begin Acknowledge Polling ; I2C Transmission Over! stop_cond polling stop_gen ; Issue a stop condition ; Begin Acknowledge Polling AN 114 ;----------------------------------------------------------------------------; ; NAME: send_byte ; FUNCTION: Sends 8 bits (from MSB to LSB) to SDA and reads 1 bit from SDA ; INPUTS: A ; OUTPUTS: NONE ; CALLS: send_bit, get_bit ; AFFECTED: COUNT, TEMP, A ; ;----------------------------------------------------------------------------send_byte: mov mov bit_loop: mov anl call next_bit: mov rl mov djnz setb call ret ;----------------------------------------------------------------------------; ; NAME: send_bit ; FUNCTION: Places a bit on SDA and initiates a clock pulse on SCL ; INPUTS: A ; OUTPUTS: NONE ; CALLS: clock ; AFFECTED: SDA ; ;----------------------------------------------------------------------------send_bit: clr jz setb sent_zero: call ret SDA sent_zero SDA clock ; Pull SDA Low ; Should SDA really be LOW? ; If Not, pull SDA HIGH ; Initiate a clock pulse COUNT,#8 TEMP,a ; Set loop for 8 repetitions ; store as shifted byte (no shift) a,TEMP ; Retrieve last saved shifted byte a,#10000000b ; Mask for MSB (Most Significant Bit) send_bit ; Place this bit on SDA a,TEMP ; a ; TEMP,a ; COUNT,bit_loop SDA ; clock ; ; Retrieve last saved shifted byte Rotate all bits 1 position left Store this updated shifted byte let SDA go high after 8th bit When all 8 bits done, read SDA line (ACKnowledge pulse) ;----------------------------------------------------------------------------; REV 1.1 11/12/02 www.xicor.com 8 of 12 Application Note ; NAME: clock ; FUNCTION: Issues a LOW-HIGH-LOW clock pulse of sufficient duration ; & reads SDA during the high phase, just in case its needed ; INPUTS: NONE ; OUTPUTS: C ; CALLS: NONE ; AFFECTED: SCL, C ; ;----------------------------------------------------------------------------clock: nop ; Let SDA Set-up setb SCL ; Pull SCL HIGH and hold nop nop nop mov c,SDA ; Move SDA bit into carry flag clr SCL ; Pull SCL LOW ret ;----------------------------------------------------------------------------; ; NAME: get_byte ; FUNCTION: Receives 8 bits from SDA (MSB to LSB) and sends 1 bit to SDA ; INPUTS: NONE ; OUTPUTS: DATA_BYTE ; CALLS: clock, send_bit ; AFFECTED: COUNT, SDA, A, DATA_BYTE ; ;----------------------------------------------------------------------------get_byte: setb mov get_loop: call rlc djnz mov clr call ret SDA COUNT,#8 ; Receiver shouldn't drive SDA low ; Set Loop count to 8 repetitions Clock in the current bit Reconstruct byte using left shifts Store retrieved Byte for user A <- LOW (Sending a 0) Send an acknowledge AN 114 clock ; a ; COUNT,get_loop DATA_BYTE,a ; a ; send_bit ; ;----------------------------------------------------------------------------; ; NAME: start_cond (Start Condition) ; FUNCTION: Issues an I2C bus start condition ; INPUTS: NONE ; OUTPUTS: NONE ; CALLS: NONE ; AFFECTED: SDA, SCL ; ;----------------------------------------------------------------------------start_cond: setb setb nop nop nop nop clr nop nop nop nop REV 1.1 11/12/02 SDA SCL ; Pull SDA HIGH and allow set-up ; Pull SCL HIGH and hold SDA ;Pull SDA LOW (SCL=HIGH) and hold www.xicor.com 9 of 12 Application Note clr ret SCL ;Complete clock pulse ;----------------------------------------------------------------------------; ; NAME: stop_cond (Stop condition) ; FUNCTION: Issues an I2C bus stop condition ; INPUTS: NONE ; OUTPUTS: NONE ; CALLS: NONE ; AFFECTED: SDA, SCL ; ;----------------------------------------------------------------------------stop_cond: clr setb nop nop nop nop setb ret SDA SCL ; Pull SDA LOW and hold ; Pull SCL HIGH and hold AN 114 SDA ; Pull SDA HIGH (SCL=HIGH) ;----------------------------------------------------------------------------; ; NAME: ack_send (Send Acknowledge) ; FUNCTION: Sends an acknowledge bit to complete SDA line data reads ; INPUTS: NONE ; OUTPUTS: NONE ; CALLS: send_bit ; AFFECTED: A ; ;----------------------------------------------------------------------------ack_send: clr call ret a SEND_BIT ; A <- LOW (Sending a 0) ; Send the bit! ;----------------------------------------------------------------------------; ; NAME: polling (Acknowledge polling for XFR_WCR, WRITE_DR, GXFR_WCR) ; FUNCTION: Sends dummy commands to X9408 during an internal write cycle ; so that the end of the cycle is marked by an acknowledge ; INPUTS: ADDR_BYTE ; OUTPUTS: NONE ; CALLS: start_cond, send_byte ; AFFECTED: C ; ;----------------------------------------------------------------------------polling: call mov again: call jc ret SEND_BYTE POLLING ; If C=1, then there was no ACK START_COND a,ADDR_BYTE ; Re-establish I2C protocol ; Attempt to send a dummy command REV 1.1 11/12/02 www.xicor.com 10 of 12 Application Note ;----------------------------------------------------------------------------; ; PUT MAIN PROGRAM HERE... ; ; Below are sample main programs calling the various command routines ; ;----------------------------------------------------------------------------main: mov SP, #STACK_TOP; Initialize stack pointer AN 114 ;---------------------------------------------------------------------------; ; The following section is required for the Cygnal processor. This could ; change for different versions of the 80C51. ; ; Disable the WDT. (IRQs not enabled at this point.) ; If interrupts were enabled, they would need to be explicitly disabled ; so that the 2nd move to WDTCN occurs no more than four clock ; cycles after the first move to WDTCN. clr mov mov EA ; Disable interupts WDTCN, #0DEh; Cygnal processor specific WDTCN, #0ADh; Cygnal processor specific ; Enable the Port I/O Crossbar mov mov XBR2, #40h ; Cygnal processor specific (enable weak pull ups) PRT1CF, #00h ; Cygnal processor specific ; Set no ports as push-pull (this processor ; operates from 3.3V, but the X9408 operates from ; 5V, so the 8051 outputs must be pulled up to 5V ; with external resistors.) ;----------------------------------------------------------------------------; ; The following are sample code segments for use in the main program... ; The potentiometer was A0-A3 pins were set to address 0Ch. ; ;----------------------------------------------------------------------------write_2_wcr: mov mov mov mov call ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte ID, #WCR_2 ; Specify WCR for DCP#2 COMMAND, #WRITEWCR; Write to WCR DATA_BYTE, #43; Set wiper position to tap 43 execute read_from_wcr: mov ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte mov ID, #WCR_2 ; Specify WCR for DCP#2 mov COMMAND, #READWCR; Read WCR call execute ; WCR value is in DATA_BYTE write_2_dr: mov mov mov mov call ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte ID, #DCP2_R1; Specify DR#1 for DCP#2 COMMAND, #WRITEDR; Write to DR DATA_BYTE, #21; Set data value to 21 execute REV 1.1 11/12/02 www.xicor.com 11 of 12 Application Note read_from_dr: mov mov mov call mov_dr_2_wcr: mov mov mov call mov_wcr_2_dr: mov mov mov call ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte ID, #DCP2_R1; Specify DR#1 for DCP#2 COMMAND, #READDR; Read DR execute ; DR value is in DATA_BYTE ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte ID, #DCP2_R1; Specify DR#1 to WCR of DCP#2 COMMAND, #XFRDR; Transfer DR to WCR execute ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte ID, #DCP2_R1; Specify WCR to DR#1 of DCP#2 COMMAND, #XFRWCR; Transfer WCRto DR execute AN 114 global_dr_2_wcr: mov ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte mov ID, #DR_1 ; Specify DR#1 to WCR mov COMMAND, #GXFRDR; Transfer DR to WCR call execute global_wcr_2_dr: mov ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte mov ID, #DR_1 ; Specify WCR to DR#1 of DCP#2 mov COMMAND, #GXFRWCR; Transfer WCRto DR call execute decr_wiper: mov mov mov mov call incr_wiper: mov mov mov mov call END ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte ID, #WCR_2 ; Select DCP#2 PULSES, #0Fh; Decrement DCP#2 for 16 pulses COMMAND, #INCDECWIPER; INC wiper execute ADDR_BYTE, #SLAVE_ADR12; Load Slave address byte ID, #WCR_2 ; Select DCP#2 PULSES, #8Fh; Increment DCP#2 for 16 pulses COMMAND, #INCDECWIPER; DEC wiper execute REV 1.1 11/12/02 www.xicor.com 12 of 12 |
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